Option for synchronous reset of axi interface
To get the maximum performance, and smallest of a design the same type of reset should be used throughout the design, according to this document: https://www.xilinx.com/support/documentation/white_papers/wp275.pdf
This register generator currently uses asynchronous reset. It would be nice to have an option to use synchronous reset. If the reset of the design uses synchronous reset, all flip-flops would use the same type of reset and can be implemented directly into the flip-flop yielding better performance and are usage. Currently there is no way of changing the type of reset, which is unfortunate if used in a design that implements synchronous reset.